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Two-dimensional semiconductors such as transition-metal dichalcogenides (TMDs) are of tremendous interest for scaled logic and memory applications. One of the most promising TMDs for scaled transistors is molybdenum disulfide (MoS2), and several recent reports have shown excellent performance and scalability for MoS2 MOSFETs. An often overlooked feature of MoS2 is that its wide band gap (1.8 eV in monolayer) and high effective masses should lead to extremely low off-state leakage currents. These features could be extremely important for dynamic memory applications where the refresh rate is the primary factor affecting the power consumption. Theoretical predictions suggest that leakage currents in the 10(-18) to 10(-15) A/μm range could be possible, even in scaled transistor geometries. Here, we demonstrate the operation of one- and two-transistor dynamic memory circuits using MoS2 MOSFETs. We characterize the retention times in these circuits and show that the two-transistor memory cell reveals MoS2 MOSFETs leakage currents as low as 1.7 × 10(-15) A/μm, a value that is below the noise floor of conventional DC measurements. These results have important implications for the future use of MoS2 MOSFETs in low-power circuit applications.

作者:Chaitanya U, Kshirsagar;Weichao, Xu;Yang, Su;Matthew C, Robbins;Chris H, Kim;Steven J, Koester

来源:ACS nano 2016 年 10卷 9期

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作者:
Chaitanya U, Kshirsagar;Weichao, Xu;Yang, Su;Matthew C, Robbins;Chris H, Kim;Steven J, Koester
来源:
ACS nano 2016 年 10卷 9期
标签:
2D materials MOSFET MoS2 memory transition-metal dichalcogenides
Two-dimensional semiconductors such as transition-metal dichalcogenides (TMDs) are of tremendous interest for scaled logic and memory applications. One of the most promising TMDs for scaled transistors is molybdenum disulfide (MoS2), and several recent reports have shown excellent performance and scalability for MoS2 MOSFETs. An often overlooked feature of MoS2 is that its wide band gap (1.8 eV in monolayer) and high effective masses should lead to extremely low off-state leakage currents. These features could be extremely important for dynamic memory applications where the refresh rate is the primary factor affecting the power consumption. Theoretical predictions suggest that leakage currents in the 10(-18) to 10(-15) A/μm range could be possible, even in scaled transistor geometries. Here, we demonstrate the operation of one- and two-transistor dynamic memory circuits using MoS2 MOSFETs. We characterize the retention times in these circuits and show that the two-transistor memory cell reveals MoS2 MOSFETs leakage currents as low as 1.7 × 10(-15) A/μm, a value that is below the noise floor of conventional DC measurements. These results have important implications for the future use of MoS2 MOSFETs in low-power circuit applications.